Fatima Anwar

209E Knowles Engineering Building · UMass Amherst · MA 01003 · fanwar(at)umass(dot)edu

I am an assistant professor at UMass Amherst Computer Engineering department. I did my PhD in Electrical & Computer Engineering (ECE) at UCLA (2019), where I was advised by Professor Mani B Srivastava. My research interests lie in the intersection of system design, security, and quality of time in distributed Cyber-Physical Systems and Internet of Things. Recently, my focus is to establish a research group with a significant focus on designing systems for emerging embedded technologies while preserving security and privacy. I am also interested in addressing the fair use of commercial technology by proper regulation. I also have a lasting commitment towards increasing participation of diverse groups in STEM, and volunteered for Los Angeles Computing Circle (LACC) and Engineering day for Girls. I am a Qualcomm Innovation Fellowship finalist in 2018 [my finalist talk], and Grace Hopper Scholar in 2017.

News

  • June 2019: Featured in ECE UCLA website. Check it out here.
  • May 2019: Successfully defended my dissertation.
  • Mar 2019: Joining UMASS Amherst as a tenure-track assistant professor in Fall'19.
  • Mar 2018: Selected as Qualcomm Innovation Fellowship Finalist.
  • Aug 2017: Won best presentation award at N2Women SIGCOMM'17.
  • July 2017: Selected as Grace Hopper Scholar.

Publications

Invited Talks

  • Mar 2019: Quality of Time: A New Perspective to Design Cyber-Physical Systems, University of Virginia
  • Feb 2019: Quality of Time: A New Perspective to Design Cyber-Physical Systems, Georgia Tech
  • Feb 2019: Quality of Time: A New Perspective to Design Cyber-Physical Systems, UMASS Amherst
  • Oct 2018: Stale time is a security threat, ENGR 191 Research Seminar, UCLA
  • Apr 2018: TNT: Trusted Notion of Time for Resilient Autonomous Driving, QInF'18 Finalist talk, San Diego
  • Mar 2018: Lip Sync: Achieving perfect synchrony in audio and video, Grad Slam 3 minute research talk, UCLA
  • Dec 2017: Quality of Time in Cyber Physical Systems, at System Energy Efficiency Lab (SeeLab), UCSD
  • Aug 2017: Timing Abstractions and Programmable Clocks in Network Programming, SIGCOMM lightning talk

Experience

Graduate Student Researcher

Networked & Embedded Systems Lab (NESL), UCLA
The following projects highlight my contributions in designing secure systems:
  • TimeSeal develops the first trustworthy clock that cannot be manipulated by a privileged attacker – the OS. My work provides security guarantees against this powerful attacker. I discovered three key challenges that must be addressed to secure time i.e (i) find a trusted timer that no adversary can manipulate (defeat timer attacks), (ii) provide a secure path to that trusted timer (overcome delay attacks), and (iii) maintain timekeeping software that is unaffected by attacks (thwart scheduling attacks). I leveraged TEE for hardware timer protection in TimeSeal design, and exploited the structure of TEE to construct high resolution counters that detect attacks when they occur. I showed that TimeSeal secures time using only software based changes on TEE.
  • Feedforward protects time transfer packets from man-in-the-middle attacks. Time Transfer packets share global time among physically or geographically separated entities. Malicious network elements can replay, pre-play, and delay these packets. Most of these attacks are mitigated by cryptographic mechanisms, but delay attacks violate packet timeliness and considered too strong to protect against. In contrast to approaches that focus on mitigating malicious network delays, my approach uses these malicious delays to its own advantage. The key intuition is finding those consecutive packets that are almost equally delayed, and preserve relative frequency difference. My approach synchronized frequencyand time of distributed devices using feedforward controllers in the presence of a powerful network attacker capable of attacking all packets in the network
The following projects highlight my contributions in designing systems around abstractions:
  • Quality of Time Architecture based on Timeline: I devised a completely new way of acquiring time information, and redesigned the hardware, OS and network interfaces that help timing information flow between applications and systems. I introduced the notion of Quality of Time (QoT) that collectively captures various time metrics such as resolution, accuracy, stability, and integrity. Analogous to Quality of Service (QoS) in networking, QoT treats time as a controllable OS primitive with observable uncertainty. To provide required QoT, I proposed timeline, the first OS abstraction that reacts to application timing demands, and exposes QoT to applications in an easy-to-use, secure, and scalable way. This degree of richness of information had never been available to coordinated applications whose activities are choreographed across time and space. This was immediately relevant to the larger field of CPS addressing the emerging temporal use cases for applications at the cloud and the edge. As such, this work has motivated follow-up research in geo-distributed CPS, virtualization, and coordinated manufacturing and driving.
  • OpenClock extends the above approach and provides the first testbed of multiple disciplinable clocks on a single platform for fair algorithmic comparison under failures, and adversarial attacks. It features a rich set of clock abstractions by virtualizing time related resources for modular and extensible design, and an attack simulator for testing algorithmic resilience. Researchers leverage the attack capability to find vulnerabilities, and test the resilience of synchronization algorithms. I prototype OpenClock on an embedded platform and x86 desktop.
  • Wireless Precise Hardware Clock (wPHC) was the first to bring precision time support to wireless personal area networks with full backward compatibility for protocols and platforms. This work also served as a guideline for precise timestmping via Linux sockets on a wide variety of network interfaces, processors, and co-processors.
  • Cyclops lays the foundation for CPS applications that enjoy high-level features with low-level determinism for time-critical operations. It provides automated configuration, a high-level programming language, and a library to interface a real-time unit with the OS. I proposed that a real-time unit paired with an OS should provide the best of both worlds: the real-time unit handles time-sensitive aspects, and the OS provides the filesystem, scheduling, and networking. In practice, I used Cyclops in smart grid research to develop a Phasor Measurement Unit (PMU) to detect and isolate grid faults in a timely manner.

I was a part of NSF project, RoseLine: Enabling Robust, Secure and Efficient Knowledge of Time Across the System Stack, which is revolutionizing how we keep track of time in Cyber Physical Systems. It involves researchers from CMU, UCLA, UCSB, UCSD, and the University of Utah.

Sep 2014 - June 2019

Awards

  • Qualcomm Innovation Fellowship (QInF) Finalist, 2018
  • Best lightning talk award at N2Women Workshop Sigcomm, 2017
  • Selected as Grace Hopper Scholar, 2017
  • University of California Los Angeles EE Departmental Fellowship, 2014
  • Korean Govt. Scholarship, Brain Korea (BK21) for MS, 2009-2011
  • Finalist in robotics project competition in SOFTEC, 4th International Event, 2008
  • Recipient of HSS Bright Students Scholarship, Pakistan, 2004