Holcomb Webpage
dan

Daniel Holcomb
Assistant Professor
Electrical and Computer Engineering
University of Massachusetts Amherst

email:        [PGP]
phone:     413-545-6593
office:     309H Knowles Engineering Building

Research Interests

My research investigates methodologies for secure and reliable embedded systems. My work toward this goal spans computer engineering topics including formal verification, design automation, VLSI, and hardware security.

Publications

JabRef references

2017

S Keshavarz, D Holcomb "Threshold-based Obfuscated Keys with Quantifiable Security against Invasive Readout", IEEE/ACM International Conference On Computer Aided Design (ICCAD'17), 2017 (to appear).
BibTeX:
@InProceedings{keshavarz-17-threshold-based,
Title               = {Threshold-based Obfuscated Keys with Quantifiable Security against Invasive Readout},
Author              = {Keshavarz, Shahrzad and Holcomb, Daniel E},
Booktitle           = {IEEE/ACM International Conference On Computer Aided Design (ICCAD'17)},
Year                = {2017 (to appear)},
Month               = Nov
}
		
SN Dhanuskodi, D Holcomb "An improved clocking methodology for energy efficient low area AES architectures using register renaming", IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED'17), 2017.
BibTeX:
@InProceedings{dhanuskodi-17-aes-renaming,
Title               = {An Improved Clocking Methodology for Energy Efficient Low Area AES Architectures using Register Renaming},
Author              = {Dhanuskodi, Siva Nishok and Holcomb, Daniel E},
Booktitle           = {IEEE/ACM International Symposium on Low Power Electronics and Design},
Year                = {2017},
Month               = Jul
}
		
D Holcomb "Nanoscale CMOS Memory-based Security Primitive Design", Security Opportunities in Nano Devices and Emerging Technologies, M. Tehranipoor, D. Forte, G. Rose, S. Bhunia (Eds.), Publisher: CRC Press/Taylor & Francis, 2017.
S Keshavarz, D Holcomb "Privacy Leakages in Approximate Computation", IEEE International Symposium on Circuits and Systems (ISCAS'17), 2017.
S Keshavarz, C Paar, D Holcomb "Design automation for obfuscated circuits with multiple viable functions", In Proceedings of Design Automation and Test in Europe (DATE '17)., March, 2017.
C Yu, D Holcomb, M Ciesielski "Reverse engineering of irreducible polynomials in GF (2 m) arithmetic", In Proceedings of Design Automation and Test in Europe (DATE '17)., March, 2017.
C Yu, X Zhang, D Liu, M Ciesielski, D Holcomb "Incremental SAT-based Reverse Engineering of Camouflaged Logic Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, January, 2017.

2016

X Xu, DE Holcomb "Reliable PUF design using failure patterns from time-controlled power gating", Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2016.
X Xu, DE Holcomb "A clockless sequential PUF with autonomous majority voting", Great Lakes Symposium on VLSI, 2016.
SN Dhanuskodi, D Holcomb "Energy Optimization of Unrolled Block Ciphers using Combinational Checkpointing", RFIDSec 2016: 12th Workshop on RFID and IoT Security, 2016.
A Vijayakumar, VC Patil, DE Holcomb, C Paar, S Kundu "Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device-and Logic-Level Techniques", IEEE Transactions on Information Forensics and Security, 2016.
S Ghandali, GT Becker, D Holcomb, C Paar "A Design Methodology for Stealthy Parametric Trojans and Its Application to Bug Attacks", Cryptographic Hardware and Embedded Systems (CHES'16), 2016.
SN Dhanuskodi, S Keshavarz, D Holcomb "LLPA: Logic State Based Leakage Power Analysis", 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016.
X Xu, W Burleson, DE Holcomb "Using Statistical Models to Improve the Reliability of Delay-Based PUFs", VLSI (ISVLSI), 2016 IEEE Computer Society Annual Symposium on, 2016.
S Vyas, NK Dumpala, R Tessier, DE Holcomb "Improving the Efficiency of PUF-Based Key Generation in FPGAs using Variation-Aware Placement", 26th International Conference on Field-Programmable Logic and Applications (FPL), 2016.
J Hester, N Tobias, A Rahmati, L Sitanayah, DE Holcomb, K Fu, W Burleson, J Sorber "Persistent Clocks for Batteryless Sensing Devices", ACM Transactions on Embedded Computing Systems (TECS), 2016.
Liu D, Yu C, Zhang X, and Holcomb DE "Oracle-Guided Incremental SAT Solving to Reverse Engineer Camouflaged Logic Circuits", In Proceedings of Design Automation and Test in Europe (DATE '16)., March, 2016.
BibTeX:
@InProceedings{liu-16-oracle-guided,
Title               = {Oracle-Guided Incremental SAT Solving to Reverse Engineer Camouflaged Logic Circuits},
Author              = {Liu, Duo and Yu, Cunxi and Zhang, Xiangyu and Holcomb, Daniel E},
Booktitle           = {Proceedings of Design Automation and Test in Europe (DATE '16)},
Year                = {2016 (to appear)},
Month               = mar
}
		

2015

Rahmati A, Hicks M, Holcomb DE, and Fu K, "Probable Cause: The Deanonymizing Effects of Approximate DRAM", in ISCA'15: Proceedings of the 42nd Annual International Symposium on Computer Architecture, June 2015.
BibTeX:
@inproceedings{rahmati-15-probable-cause,
author         = {Rahmati, Amir and Hicks, Matthew and Holcomb, Daniel E. and Fu, Kevin},
title          = {Probable Cause: The Deanonymizing Effects of Approximate DRAM},
booktitle      = {Proceedings of the 42nd Annual International Symposium on Computer Architecture},
series         = {ISCA '15},
year           = {2015},
isbn           = {978-1-4503-3402-0},
pages          = {604--615},
numpages       = {12},
doi            = {10.1145/2749469.2750419},
publisher      = {ACM},
} 
		
Xu X, Rührmair U, Holcomb DE, and Burleson WP, "Security Evaluation and Enhancement of Bistable Ring PUFs", In RFIDSec'15: Proceedings of the 11th international conference on Radio Frequency Identification: security and privacy issues., June, 2015.
BibTeX:
@inproceedings{xu-15-security-evaluation,
author        = {Xu, X and Ruhrmair, U and Holcomb, DE and Burleson, WP},
title         = {Security Evaluation and Enhancement of Bistable Ring PUFs},
booktitle     = {RFIDSec'15: Proceedings of the 11th international conference on Radio Frequency Identification: security and privacy issues},
year          = {2015},
}
		
Xu X, Rahmati A, Holcomb DE, Fu K and Burleson W, "Reliable Physical Unclonable Functions using Data Retention Voltage of SRAM Cells", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, June 2015, Vol. 34(6), pp. 903-914.
BibTeX:
@article{xu-15-drv,
author      = {Xu, X. and Rahmati, A. and Holcomb, D.E. and Fu, K. and Burleson, W.}, 
title       = {Reliable Physical Unclonable Functions using Data Retention Voltage of SRAM Cells},
journal     = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
year        = {2015},
month       = {June},
volume      = {34},
number      = {6},
pages       = {903-914}, 
}
		

2014

Holcomb DE and Fu K, "Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM", In Cryptographic Hardware and Embedded Systems (CHES 2014)., September, 2014. Vol. 8731, pp. 510-526.
BibTeX:
@inproceedings{holcomb-14-bitline-puf,
author       = {Holcomb, Daniel E and Fu, Kevin},
editor       = {Batina, Lejla and Robshaw, Matthew},
title        = {Bitline PUF: Building Native Challenge-Response PUF Capability into Any SRAM},
booktitle    = {Cryptographic Hardware and Embedded Systems (CHES 2014)},
year         = {2014},
volume       = {8731},
pages        = {510-526},
slides_url   = {https://spqr.eecs.umich.edu/slides/holcomb_bitline_ches14_slides.pdf},
url          = {https://spqr.eecs.umich.edu/papers/holcomb_bitline_ches14.pdf}
}
		
Rührmair U and Holcomb DE, "PUFs at a Glance", In Proceedings of Design Automation and Test in Europe (DATE '14)., March, 2014.
BibTeX:
@inproceedings{ruhrmair-14,
author       = {Ruhrmair, Ulrich and Holcomb, Daniel E.},
title        = {PUFs at a Glance},
booktitle    = {Proceedings of Design Automation and Test in Europe (DATE '14)},
year         = {2014},
month        = mar,
slides_url   = {https://spqr.eecs.umich.edu/slides/holcomb_PUFs_date14_slides.pdf},
url          = {https://spqr.eecs.umich.edu/papers/holcomb_PUFs_date14.pdf}
}
		
Holcomb DE and Seshia SA, "Compositional Performance Verification of Network-on-Chip Designs", Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. Vol. 33(9), pp. 1370-1383.
BibTeX:
@article{holcomb-14-compositional-performance,
author    = {Holcomb, D E and Seshia, S A},
title     = {Compositional Performance Verification of Network-on-Chip Designs},
journal   = {Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on},
year      = {2014},
volume    = {33},
number    = {9},
pages     = {1370--1383}
}
		
Holcomb DE and Fu K, "QBF-Based Synthesis of Optimal Word-Splitting in Approximate Multi-Level Storage Cells", In Workshop on Approximate Computing Across the System Stack (WACAS). Salt Lake City, UT, March, 2014.
BibTeX:
@inproceedings{holcomb-wacas2014,
author       = {Daniel E. Holcomb and Kevin Fu},
title        = {QBF-Based Synthesis of Optimal Word-Splitting in Approximate Multi-Level Storage Cells},
booktitle    = {Workshop on Approximate Computing Across the System Stack (WACAS)},
year         = {2014},
slides_url   = {https://spqr.eecs.umich.edu/slides/holcomb_qbf_wacas14_slides.pdf},
url          = {https://spqr.eecs.umich.edu/papers/holcomb_qbf_wacas14.pdf}
}
		
Rahmati A, Hicks M, Holcomb DE and Fu K, "Refreshing Thoughts on DRAM: Power Saving vs. Data Integrity", In Workshop on Approximate Computing Across the System Stack (WACAS). Salt Lake City, UT, March, 2014.
BibTeX:
@inproceedings{rahmati-wacas2014,
author       = {Amir Rahmati and Matthew Hicks and Daniel E. Holcomb and Kevin Fu},
title        = {Refreshing Thoughts on DRAM: Power Saving vs. Data Integrity},
booktitle    = {Workshop on Approximate Computing Across the System Stack (WACAS)},
year         = {2014},
url          = {https://spqr.eecs.umich.edu/dram/rahmati-wacas14.pdf}
}
		

2013

Jha S, Talalay M, Holcomb D, Ogras U, Kishinevsky M, Klinglesmith M, De Gruijl R and Choi S, "Automated Design Space Exploration for SoC Interconnects", Intel Design Technology and Tools Conference.
BibTeX:
@article{jha-13-automated-design,
author    = {Jha, Susmit and Talalay, Mikhail and Holcomb, Dan and Ogras, Umit and Kishinevsky, Michael and Klinglesmith, Michael and De Gruijl, Robert and Choi, Seonil},
title     = {Automated Design Space Exploration for SoC Interconnects},
journal   = {Intel Design Technology and Tools Conference},
year      = {2013}
}
		

2012

Holcomb DE, Gotmanov A, Kishinevsky M and Seshia SA, "Compositional Performance Verification of NoC Designs", In Proceedings of the 10th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE)., July, 2012. , pp. 1-10.
BibTeX:
@inproceedings{holcomb-12-compositional-performance,
author       = {Holcomb, Daniel E and Gotmanov, Alexander and Kishinevsky, Michael and Seshia, Sanjit A},
title        = {Compositional Performance Verification of NoC Designs},
booktitle    = {Proceedings of the 10th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE)},
year         = {2012},
pages        = {1--10}
}
		
Holcomb DE, Rahmati A, Salajegheh M, Burleson WP and Fu K, "DRV-Fingerprinting: using data retention voltage of SRAM cells for chip identification", In RFIDSec'12: Proceedings of the 8th international conference on Radio Frequency Identification: security and privacy issues., July, 2012. Springer-Verlag.
BibTeX:
@inproceedings{holcomb-12-drv-fingerprinting,
author      = {Holcomb, Daniel E and Rahmati, Amir and Salajegheh, Mastooreh and Burleson, Wayne P and Fu, Kevin},
title       = {DRV-Fingerprinting: using data retention voltage of SRAM cells for chip identification},
booktitle   = {RFIDSec'12: Proceedings of the 8th international conference on Radio Frequency Identification: security and privacy issues},
publisher   = { Springer-Verlag},
year        = {2012},
url         = {https://spqr.eecs.umich.edu/papers/holcomb-rfidsec12.pdf}
}
		
Rahmati A, Salajegheh M, Holcomb D, Sorber J, Burleson WP and Fu K, "TARDIS: Time and Remanence Decay in SRAM to Implement Secure Protocols on Embedded Devices without Clocks", In Proceedings of the 21st USENIX Security Symposium. Bellevue, WA, August, 2012.
BibTeX:
@inproceedings{rahmati-12-tardis,
author       = {Amir Rahmati and Mastooreh Salajegheh and Dan Holcomb and Jacob Sorber and Wayne P. Burleson and Kevin Fu},
title        = {TARDIS: Time and Remanence Decay in SRAM to Implement Secure Protocols on Embedded Devices without Clocks},
booktitle    = {Proceedings of the 21st USENIX Security Symposium},
year         = {2012},
url          = {https://spqr.eecs.umich.edu/papers/rahmati-usenix12.pdf}
}
		

2011

Brady BA, Holcomb D and Seshia SA, "Counterexample-guided smt-driven optimal buffer sizing", In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011. , pp. 1-6.
BibTeX:
@inproceedings{brady-11-counterexample-guided,
author       = {Brady, Bryan A and Holcomb, Daniel and Seshia, Sanjit A},
title        = {Counterexample-guided smt-driven optimal buffer sizing},
booktitle    = {Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011},
year         = {2011},
pages        = {1--6}
}
		
Holcomb D, Brady B and Seshia S, "Abstraction-based performance verification of NoCs", In Proceedings of the 48th Design Automation Conference., June, 2011. , pp. 492-497.
BibTeX:
@inproceedings{holcomb-11-abstraction-based,
author      = {Holcomb, Daniel and Brady, Bryan and Seshia, Sanjit},
title       = {Abstraction-based performance verification of NoCs},
booktitle   = {Proceedings of the 48th Design Automation Conference},
year        = {2011},
pages       = {492--497}
}
		

2010

Lin L, Holcomb DE, Krishnappa DK, Shabadi P and Burleson W, "Low-power sub-threshold design of secure physical unclonable functions", Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on. , pp. 43-48.
BibTeX:
@article{lin-10-low-power,
author     = {Lin, Lang and Holcomb, Daniel E and Krishnappa, D K and Shabadi, P and Burleson, W},
title      = {Low-power sub-threshold design of secure physical unclonable functions},
journal    = {Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on},
year       = {2010},
pages      = {43--48}
}
		
Zaveri RA, Voss PB, Berkowitz CM, Fortner E, Zheng J, Zhang R, Valente RJ, Tanner RL, Holcomb D, Hartley TP and Baran L, "Overnight atmospheric transport and chemical processing of photochemically aged Houston urban and petrochemical industrial plume", Journal of Geophysical Research: Atmospheres (1984--2012). Vol. 115(D23) Wiley Online Library.
BibTeX:
@article{zaveri-10-overnight-atmospheric,
author      = {Zaveri, Rahul A and Voss, Paul B and Berkowitz, Carl M and Fortner, Edward and Zheng, Jun and Zhang, Renyi and Valente, Ralph J and Tanner, Roger L and Holcomb, Daniel and Hartley, Thomas P and Baran, Leslie},
title       = {Overnight atmospheric transport and chemical processing of photochemically aged Houston urban and petrochemical industrial plume},
journal     = {Journal of Geophysical Research: Atmospheres (1984--2012)},
publisher   = {Wiley Online Library},
year        = {2010},
volume      = {115},
number      = {D23}
}
		

2009

Holcomb DE, Burleson WP and Fu K, "Power-up SRAM State as an Identifying Fingerprint and Source of True Random Numbers", IEEE Transactions on Computers., September, 2009. Vol. 58(9), pp. 1198-1210.
BibTeX:
@article{holcomb-09-power-up,
author     = {Holcomb, Daniel E. and Burleson, Wayne P. and Fu, Kevin},
title      = {Power-up SRAM State as an Identifying Fingerprint and Source of True Random Numbers},
journal    = {IEEE Transactions on Computers},
year       = {2009},
volume     = {58},
number     = {9},
pages      = {1198--1210},
url        = {https://spqr.eecs.umich.edu/papers/holcomb-FERNS-IEEE-Computers.pdf}
}
		
Holcomb DE, Li W and Seshia SA, "Design as you see FIT: System-level soft error analysis of sequential circuits", In Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09. , pp. 785-790.
BibTeX:
@inproceedings{holcomb-09-design-as,
author      = {Holcomb, Daniel E and Li, Wenchao and Seshia, S A},
title       = {Design as you see FIT: System-level soft error analysis of sequential circuits},
booktitle   = {Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09},
year        = {2009},
pages       = {785--790}
}
		

2008

2007

Holcomb DE, Burleson WP and Fu K, "Initial SRAM State as a Fingerprint and Source of True Random Numbers for RFID Tags", In Proceedings of the Conference on RFID Security., July, 2007.
BibTeX:
@inproceedings{holcomb-07-initial-sram,
author      = {Holcomb, Daniel E. and Burleson, Wayne P. and Fu, Kevin},
title       = {Initial SRAM State as a Fingerprint and Source of True Random Numbers for RFID Tags},
booktitle   = {Proceedings of the Conference on RFID Security},
year        = {2007},
url         = {https://spqr.eecs.umich.edu/papers/holcomb-FERNS-RFIDSec07.pdf}
}
		

2006

Riddle EE, Voss PB, Stohl A and Holcomb DE, "Trajectory model validation using newly developed altitude-controlled balloons during the International Consortium for Atmospheric Research on Transport and Transformations 2004 campaign", Journal of Geophysical Research.
BibTeX:
@article{riddle-06,
author      = {Riddle, E E and Voss, P B and Stohl, A and Holcomb, Daniel E},
title       = {Trajectory model validation using newly developed altitude-controlled balloons during the International Consortium for Atmospheric Research on Transport and Transformations 2004 campaign},
journal     = {Journal of Geophysical Research},
year        = {2006}
}
		

About

Before joining UMass, in 2014 I was a research fellow at the University of Michigan in the Security and Privacy Research Group working with Professor Kevin Fu. My work there was on designing secure low-power embedded systems. This work included developing novel methodologies for physical cryptography, approximate computing, and attack mitigation.

In 2013 I completed my PhD in Electrical Engineering and Computer Sciences at UC Berkeley. My thesis advisor was Professor Sanjit Seshia. My dissertation develops techniques for formal verification of quantitative properties of systems, with a focus on verifying latency properties of on-chip networks using model checking. I was fortunate to collaborate with researchers from Intel's Strategic CAD Lab during my PhD.

I received my BS and MS degrees in Electrical and Computer Engineering from UMass Amherst in 2005 and 2007. My MS thesis developed novel techniques for low cost device identification and random number generation in integrated circuits. Concurrently with my MS research, I worked on soft error analysis and mitigation during two internships at Intel. My undergraduate thesis research at UMass was the design and implementation of an atmospheric research payload for the world's smallest altitude controlled research balloons, and I was fortunate to apply this work in two major air quality studies.