About Me

I am a Ph.D student in the Department of Electrical and Computer Engineering at the University of Massachusetts, Amherst. I started my Ph.D in the fall of 2012. I am interested in anything that has to do with computer networks in the broadest sense. My research interests lie specifically in areas of network control, network design and its architecture and distributed systems. My current research interests are focused on control plane architectures and algorithms for software-defined networks.

I hold a Masters in Computer Engineering from the University of Massachusetts, Amherst where I graduated from in May 2011. I pursued my research under Prof. Tilman Wolf who is also my Ph.D advisor. I am part of the Network Systems Lab here at UMass ECE. I obtained my Bachelor in Engineering majoring in Information Technology from the Visveswaraiah Technological University in 2005.





Research

My current area of research focuses on researching and building new control plane architectures and algorithms for software-defined networks. I am presently investigating the feasibility of using revision control to aid network administration and troubleshooting in a multitude of ways.

Abhishek Dwaraki and Tilman Wolf. Adaptive Service-Chain Routing for Virtual Network Functions in Software-Defined Networks. In Proceedings of ACM SIGCOMM Workshop on Hot Topics in Middleboxes and Network Function Virtualization (HotMiddleBox '16)

Abhishek Dwaraki, Srini Seetharaman, Sriram Natarajan, and Tilman Wolf. GitFlow: Flow Revision Management for Software-Defined Networks. In Proceedings of the 1st ACM SIGCOMM Symposium on Software Defined Networking Research (SOSR '15)

Abhishek Dwaraki, Srini Seetharaman, Sriram Natarajan, and Tilman Wolf. State Abstraction and Management in Software-Defined Networks. In Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS '15).

The ChoiceNet Project involved designing an economy plane for the Internet as part of the NSF's Future Internet Architectures initiative. My research focused on developing algorithms for efficient pathfinding and provisioning in an SDN-based implementation of ChoiceNet. A part of my work also concentrated on designing effective service description and planning methodologies for service-based networks. This body of research was part of ChoiceNet's planning and composition modules.

Dwaraki, A.; Wolf, T., "Service Instantiation in an Internet with Choices," In Proceedings of the 22nd International Conference on Computer Communications and Networks (ICCCN '13)

Xinming Chen, Abhishek Dwaraki, Hao Cai, and Tilman Wolf. Specification and composition of network services in future internet architectures. In Proceedings of the 2012 ACM conference on CoNEXT student workshop (CoNEXT Student '12).

This research area formed a bulk of my Masters thesis while at UMass, Amherst. I prototyped a variant of the queue length based pacing algorithm on the NetFPGA platform. This project aimed to show that pacing can be performed effectively at the edge of the network to help alleviate congestion in the core of the network.

Y. Sinan Hanay, Abhishek Dwaraki, Kekai Hu, Tilman Wolf, High-performance implementation of in-network traffic pacing for small-buffer networks, Journal of Computer Communications, Volume 36, Issue 13, 15 July 2013

Hanay, Y.S.; Dwaraki, A.; Wolf, T., High-performance implementation of in-network traffic pacing, In Proceedings of the IEEE 12th International Conference on High Performance Switching and Routing(HPSR), 2011

As one of my very first projects during my Masters, it involved a steep ramp up from software to hardware programmability. We attempted to demonstrate the capabilities of FPGAs in aiding network virtualization by hosting multiple router designs on a single FPGA. Each router design serviced a different virtual network and the FPGA in turn dynamically switched designs based on demand.

Deepak Unnikrishnan, Ramakrishna Vadlamani, Yong Liao, Abhishek Dwaraki, Jérémie Crenne, Lixin Gao, and Russell Tessier. "Scalable network virtualization using FPGAs" In Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays (FPGA '10)


Work Experience

Deutsche Telekom Silicon Valley Innovation Center

Research Intern

[Exploratory SDN Group - Apr-Aug '14, Jun-Sep '15]

-- A greater part of my projects in SDN control plane architectures have been developed in conjunction with my collaborators at T-Labs, Mountain View, CA. The SOSR papers and all subsequent projects are offshoots of dev work that I undertook during my summer internships here at T-Labs.

Platform: Java, C, Python


RSA, The Security Division of EMC

Device Integration Engineer

[enVision Content Engineering - May 2010 to August 2012]

-- Added, normalized and remediated new and existing event source XMLs to add and provide support for new as well as existing network security devices

-- Performed risk assessment on the normalized XMLs. Researched device messages corresponding to event source files looking for patterns and (ir)regularities

Platform: XML, Python, Scripting


Infosys Technologies Limited

Software Engineer

[Optical Ethernet Dev - May 2006 to July 2008]

-- Developed features for Nortel's Metro-Ethernet switch that involved working on protocols such as Q-in-Q, PBB, PBT and High Availability

-- Worked briefly on the testing team for integration, functional, system and regression testing phases of the product cycle.

Platform: C, C++, Assembly Programming



Get in Touch


Postal Address

  • 151 Holdsworth Way, Knowles Engg Building, Rm 204
    Amherst, MA 01003